1. Field of the Invention
This invention relates to integrated circuit fabrication and more particularly to the concurrent formation of a diffusion barrier and a salicide within a contact area of the integrated circuit.
2. Description of the Relevant Art
Fabrication of an integrated circuit involves numerous processing steps. After impurity regions have been deposited within a semiconductor substrate and gate areas defined upon the substrate, interconnect routing is placed on the semiconductor topography and connected to contact areas thereon to form an integrated circuit. The entire process of making an ohmic contact to the contact areas and routing interconnect material between ohmic contacts is described generally as "metallization". While materials other than metals are often used, the term metallization is generic in its application. It is derived from the origins of interconnect technology, where metals were the first conductors used. As the complexity of integrated circuits has increased, the complexity of the metallization composition has also increased.
In order to form highly conductive ohmic contacts in the connecting region or "window" between the interconnects (generally aluminum), it is oftentimes necessary to incorporate a layer of refractory metal at the juncture. The refractory metal, when subjected to high enough temperature, reacts with the silicon substrate in the contact window to form what is commonly called a "silicide". The unreacted metal is removed after this formation of the silicide. Silicides are well known in the art and provide dependable silicon contact as well as low ohmic resistance.
Self-aligned suicides on source/drain regions, i.e., "salicides", have increased in popularity due to the shrinking dimensions of conventional transistors. As the contact window decreases in size, it is important that contact resistance remain relatively low. Further, aligning contact windows via a separate masking step makes minimizing source/drain regions impossible. For these reasons, salicides remain a mainstay in semiconductor processing because they are good conductors and they are formed using a self-aligned process. When a metal is deposited and heated on a polysilicon gate and a silicon source/drain area, the silicide reaction occurs wherever the metal is in contact with the heavy concentration, silicon-based underlayer. However, as device dimensions shrink, so does the spacing between contact windows. Any silicide forming in light concentration areas or lateral, silicide migration between closely spaced contact windows must be carefully monitored and controlled. Otherwise, a phenomenon often referred to as "silicide shorting" can occur.
Silicide shorting often arises when the refractory metal is titanium and when titanium silicide is allowed to form between silicon contact windows, such as between a polysilicon gate and silicon source/drain areas, i.e., junctions. In a lightly doped drain (LDD) process, sidewall spacers normally exist on lateral surfaces of the polysilicon to separate the channel from the heavily concentrated source/drain junctions. The sidewall spacers are relatively small in size. Spacers are often made from an oxide material, and hereafter are referred to as "oxide spacers". During titanium silicide formation resulting from annealing in an inert-gas atmosphere (e.g., Ar) at temperatures above 600.degree. C., silicon diffuses into the titanium and then reacts over the oxide spacer regions. Formation of titanium silicide over the oxide spacer regions provides a capacitive-coupled or fully conductive path between the polysilicon gate conductor and the source/drain junctions.
Titanium silicide shorting can, in some instances, be prevented if the anneal cycle is carefully controlled. Many researchers advocate a multiple step salicide forming process. First, a refractory metal such as titanium is deposited over the entire wafer. Next, the metal film is heated to a low temperature in the presence of a nitrogen ambient in order to form a reacted, relatively high-resistance silicide in the contact windows. Next, the unreacted metal is removed using a wet chemical etch (e.g., NH.sub.4 OH:H.sub.2 O.sub.2 :H.sub.2 O) thereby leaving reacted metal or metal silicide in the contact windows. Finally, a higher temperature anneal is performed in order to produce a lower resistivity silicide.
Two anneal steps are necessary in order to prevent unwanted or excessive silicide formation in regions where silicide should not form, e.g., in the oxide spacer which bears only a relatively low concentration of silicon. In addition, is it important that the anneal steps promote silicide formation in regions where silicon concentration is relatively high, e.g., upon the conductor and the source/drain junctions. If the first anneal temperature is comparable to the second (higher) anneal temperature, then silicon dioxide layers could be consumed and silicide might result. Thus, the first anneal must be maintained at a maximum temperature of approximately 600-700.degree. C., while the subsequent anneal can extend well above 800.degree. C.
This two step anneal process has its share of problems. First, the silicon substrate is removed from the annealing chamber after the first anneal to etch the remaining metal therefrom. This withdrawal of the substrate from the chamber allows native oxides or other impurities to grow or deposit upon the reacted metal silicide which may increase contact resistance in the contact window. Further, if the first anneal temperature exceeds a pre-determined level, unwanted salicidation can occur on oxide spacers. When the contact window contains a heavily doped source/drain region, it is often necessary to increase the first anneal temperature given the relative absence of silicon with respect to impurity atoms.
Aluminum can be easily deposited on the salicide structure to form a contact Unfortunately, with the advent of high density integrated circuits having thinner diffusion junctions, some properties of aluminum have limited the applicability of using it as the sole composition of the metallization layer. After deposition of aluminum, the contact structure is sintered to bring the metal and the silicide into intimate contact Aluminum's ability to dissolve small amounts of silicon or silicon dioxide helps ensure good physical contact or adherence. However, as the temperature of the aluminum-silicon system increases, the solubility of silicon in aluminum rises. In fact, the grain boundaries of the aluminum film allow very fast diffusion of silicon at temperatures above 400.degree. C. Further, as silicon below the aluminum-silicon interface diffuses into the aluminum film, aluminum diffuses into the voids or pits left by the exiting silicon. The amount of this aluminum fill can extend completely through the source/drain junction and provide a conductive path through the junction, rendering the device inoperable. This effect is known as "junction spiking".
In order to prevent such pitting, a thin barrier layer may be placed between the aluminum and silicon to retard cross-diffusion and to resist reaction between silicon and aluminum. An ideal barrier should allow charge carriers to pass freely from the junction to the overlying metallization. A sacrificial barrier is one such barrier. A sacrificial barrier, however, has a finite lifetime and is typically not inert. When a sacrificial barrier is formed between aluminum and silicide, silicon and aluminum diffuse throughout the barrier material and form compounds in the barrier. Eventually, the initial barrier composition no longer exists. Thus, sacrificial barriers provide only a temporary fix to the problem and do not meet the stringent long-term requirements of very large scale integration (VLSI) or ultra large scale integration (ULSI) technology.
Another class of barriers, known as passive barriers, provides nearly an infinite lifetime as opposed to the finite lifetime of a sacrificial barrier. A passive barrier includes a diffusion layer made of an inert material placed between the aluminum and salicide layers. Passive barriers do not substantially react with adjacent aluminum and salicide layers. Salicides, unlike silicon, adhere well to barriers. Titanium nitride is a popular salicide barrier since it exhibits good electrical conductivity, chemical inertness, and strong atomic bonds. The titanium nitride layer can be formed using several different methods, including: sputtering the titanium in a nitrogen ambient; sputtering from a titanium nitride target in an inert ambient; performing a chemical vapor deposition; and evaporating the titanium in a nitrogen ambient.
Conventional methods used to form a barrier over a salicide layer are undesirable. Since the salicide layer is typically formed in a furnace or rapid thermal processing chamber, the device has to be moved to a different chamber before the titanium nitride layer is made. This movement from chamber to chamber exposes the salicide to ambient oxygen and other impurities which may grow on the salicide. It is well known that oxides in the contact window can impede or substantially reduce conductivity within the contact window.
It is therefore desirable that a semiconductor fabrication process be developed which does not require the removal of a silicon device from a chamber during the salicide and barrier formation steps. More specifically, a desirous process is needed whereby a the contact area is not exposed to atmosphere in the interim between silicide and barrier formation. Preventing the exposure of the salicide to ambient oxide is necessary to ensure good ohmic contact at contact windows of the device. Further, it is desirable that nitrogen effectively nitrates the areas of the refractory metal on which the salicide is unwanted but does not do so where salicide is needed. An anneal temperature which does not exceed a specified amount during salicide formation is needed to promote a nitride diffusion into a metal, i.e., titanium. As such, the desired lowered anneal temperature serves to minimize segregation and migration of pre-existing junction implants, especially position-sensitive lightly doped drain (LDD) implants.